| 摘要 |
A flat panel display apparatus includes a sampling clock generator for generating a sampling clock signal with a frequency corresponding to a synchronous signal supplied from a host, a phase detector for detecting the phase difference between the sampling clock signal and the synchronous signal to generate a phase difference data, a comparator for comparing the phase difference data with a delay data corresponding to the synchronous signal to generate a correction signal, a micro-controller for generating the delay data and for increasing or decreasing the frequency divisional value of the sampling clock generator to adjust the frequency of the sampling clock signal in response to the correction signal, and an analog to digital converter for converting an analog video signal into corresponding digital video signal in response to the sampling clock signal. Preferably, the sampling clock generator includes a phase locked loop (PLL) for adjusting the frequency of the sampling clock signal according to the frequency divisional value from the micro-controller. The phase detector comprises a high frequency clock generator for generating a high frequency clock signal with a higher frequency than that of the sampling clock signal, a counter for counting the high frequency clock signal, a latch for latching the output of the counter, and a flip-flop for enabling or disabling the counter and latch according as the synchronous signal or sampling clock signal is inputted.
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