发明名称 SOI circuit with dual-gate transistors
摘要 A dual-gate SOI transistor that has the back gate self-aligned to the front gate is formed on an SOI substrate by forming a conventional gate stack having an etch resistant layer on the top; growing epitaxial silicon on the upper surface of the silicon device layer, which leaves apertures on both sides of the gate stack; filling the apertures with etch resistant spacers; defining an etch window bracketing the gate stack and etching alignment trenches down to the bulk silicon. A shallow layer of etch resistant aligning material is deposited on the bottom of the alignment trenches, after which the conventional back end processing as followed of deposition of a supporting layer that supports the layers of the circuit during later processing. The bulk silicon is removed and the back side is patterned to expose the buried oxide below the transistors; an oxide etch leaves a self-aligned backside aperture below the transistors, defined by the etch resistant aligning material. Deposition of a back-side spacer leaves a backside gate aperture that is filled by a metal gate.
申请公布号 US6335214(B1) 申请公布日期 2002.01.01
申请号 US20000665395 申请日期 2000.09.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 FUNG KA HING
分类号 H01L21/336;H01L29/786;(IPC1-7):H01L21/00 主分类号 H01L21/336
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