发明名称 |
Integrated dielectric and method |
摘要 |
This invention pertains generally to the integration of dielectrics with integrated circuits, and more particularly to reaction barriers between high-k dielectrics and an underlying Group IV semiconductor layer. Applications for high permittivity memory cells and gate dielectrics are disclosed. This method has steps of providing a partially completed integrated circuit having a semiconductor layer substantially comprising silicon, where the layer has an exposed face. The method also includes forming an ultra-thin SiC reaction barrier at the exposed face, and depositing a high permittivity storage dielectric on the SiC reaction barrier. Typically, the SiC reaction barrier is less then 25 Å thick, preferably one or two monolayers of SiC.
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申请公布号 |
US6335238(B1) |
申请公布日期 |
2002.01.01 |
申请号 |
US19980073087 |
申请日期 |
1998.05.05 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
HANTTANGADY SUNIL V.;WALLACE ROBERT M.;GNADE BRUCE E.;OKUNO YASUTOSHI |
分类号 |
H01L21/02;H01L21/28;H01L21/8242;H01L29/51;(IPC1-7):H01L21/824;H01L31/031 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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