发明名称 |
Semiconductor device having a mark section and a dummy pattern |
摘要 |
A semiconductor device includes a plurality of real chip regions and dicing lines to separate the real chip regions on a semiconductor substrate. A dicing line includes a mark section and a mark forbidden region around the mark section. A dummy wiring pattern is formed to fill the dicing line or a portion of the real chip region to surround the mark section and the mark forbidden region. A dummy wiring pattern may be a single continuous wiring pattern or the single wiring pattern may be divided into segments. Alternatively, a dummy wiring pattern may be composed of a plurality of square portions arranged in a matrix fashion.
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申请公布号 |
US6335560(B1) |
申请公布日期 |
2002.01.01 |
申请号 |
US19990457525 |
申请日期 |
1999.12.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TAKEUCHI MASAHIKO |
分类号 |
H01L23/52;H01L21/301;H01L21/3205;H01L21/321;H01L23/544;(IPC1-7):H01L23/544;H01L29/06 |
主分类号 |
H01L23/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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