发明名称 Non-monotonic dynamic exclusive-OR/NOR gate circuit
摘要 A logic gate for producing an output signal representing a logical operation of a first logic signal and a second logic signal includes a first input terminal for receiving the first logic signal and a second input terminal for receiving the second logic signal. The logic gate further includes a first transistor, a second transistor, and an evaluation node which is connected to a pre-charge device. The first transistor has a first terminal coupled to the first input, a second terminal coupled to the evaluation node, and a third terminal coupled to the second input. The second transistor has a first terminal coupled to the second input, a second terminal coupled to the evaluation node, and a third terminal coupled to the first input. A change in either of the logic signals triggers the logic gate, and a change in both of the logic signals within a predetermined time period results in the logic signals simultaneously canceling each other out.
申请公布号 US6335639(B1) 申请公布日期 2002.01.01
申请号 US20000579106 申请日期 2000.05.25
申请人 SUN MICROSYSTEMS, INC. 发明人 AINGARAN KATHIRGAMAR
分类号 H03K19/096;H03K19/21;(IPC1-7):H03K19/096;H03K19/20 主分类号 H03K19/096
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