发明名称 CIRCUITO DI TRASMISSIONE DI SEGNALE E PROCEDIMENTO PER EQUALIZZARE TEMPI DI RITARDO DISPARATI DINAMICAMENTE, E CIRCUITO DI AGGANCIO DI DATI
摘要 <p>A signal transmission circuit and a method equalize differential delay characteristics of two signal transmission lines. A controllable delay unit is connected serially to the second line, so as to compensate by adding its internal delay. An auxiliary signal transmission line replicates the second transmission line, while it processes the input signal of the first. A controlling unit compares the output signal of the first transmission line and the of the auxiliary signal transmission line, and adjusts dynamically the internal delay of the controllable delay unit, to attain continuous synchronization. A data latch circuit synchronizes the delays of data paths by having one controllable delay units in each of the data paths.</p>
申请公布号 ITMI20011235(A1) 申请公布日期 2001.12.27
申请号 IT2001MI01235 申请日期 2001.06.12
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE JUNG-BAE;KIM KYU-HYOUN
分类号 H03K3/02;H03K5/06;H03K5/131;H03K5/14;H03L7/00;H04L1/22;H04L25/14 主分类号 H03K3/02
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