| 摘要 |
A semiconductor memory, enabled to be used efficiently, if defective is provided. The semiconductor memory (100) may include a first memory blocks (3), a second memory block (33) a shutoff signal generation circuit (1), and a switch circuit (2). The shutoff signal generation circuit (1) may include a programmable device (12) that indicates if the memory block (3) is defective. External terminals (DQ0 to DQ7) may be connected to the memory block (3) through the switch circuit (2) when there is no defect and may be disconnected from the memory block (3) when there is a defect.
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