发明名称 REDUCTION OF BLACK SILICON IN DEEP TRENCH ETCH
摘要 <p>In a method of etching a wafer in a plasma etch reactor, the improvement of conducting etching to reduce or eliminate 'black silicon' comprising: a) providing a plasma etch reactor comprising walls defining an etch chamber; b) providing a plasma source chamber remote from and in communication with the etch chamber to provide a plasma to the etch chamber, and a wafer chuck or pedestal disposed in the etch chamber to seat a wafer; c) providing a dielectric wall in proximity to and around a periphery of the wafer; d) providing a modification to a lower Rf electrode by interposing conductor means into an extension of Vdc flat sheath boundary relationship to the dielectric wall means and the wafer or in substitution for the dielectric wall; e) forming a plasma within the plasma source chamber and providing the plasma to the etch chamber; and f) supplying Rf energy to the wafer chuck to assist etching of the wafer by forming electric fields between the upper surface of the wafer and the walls of the etch chamber, to provide extension of a Vdc flat sheath boundary beyond and into a defocusing relationship to the wafer edge to reduce mask erosion and eliminate occurrence of 'black silicon' formation.</p>
申请公布号 WO2001099159(A2) 申请公布日期 2001.12.27
申请号 US2001019659 申请日期 2001.06.20
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