发明名称 METHOD FOR MANUFACTURING INTEGRATED CIRCUIT HAVING EMBEDDED DRAM AND LOGICAL UNIT
摘要 PROBLEM TO BE SOLVED: To provide a method for forming a source and a drain of an embedded DRAM device having interchangeability with a method for forming a logical unit by forming the embedded DRAM device and the logical unit on a single chip. SOLUTION: A method for manufacturing the DRAM device and the logical unit embedded in a common semiconductor substrate is disclosed. In the method, a logical unit region and a DRAM device region are formed on the substrate by selectively introducing a dopant to an isolating region of the substrate. An electric field oxide region is formed to electrically isolate various regions of the substrate. An oxide gate and a gate are then formed. The source and the drain of the device are formed by ion implanting. The source and the drain are formed by first implanting an arsenic and subsequently implanting a phosphorus. A phosphorus implanting condition is first selected by deciding a damage of the substrate and its damage position to a junction boundary of the device. The phosphorus implanting condition is then selected by moving the position of the boundary to the damage caused by the arsenic implantation.
申请公布号 JP2001358308(A) 申请公布日期 2001.12.26
申请号 JP20010128710 申请日期 2001.04.26
申请人 AGERE SYSTEMS GUARDIAN CORP 发明人 DIODATO PHILIP W;LIU CHUN-TING
分类号 H01L21/265;H01L21/8234;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L21/265
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