发明名称 POWER AMPLIFIER
摘要 PROBLEM TO BE SOLVED: To provide a power amplifier variable with respect to the operating bias point. SOLUTION: MMIC 110 has two stages of FETs 112, 113, three matching circuits 111, 113, 115 and two gate bias resistors 116, 117 integrated together. A drain bias circuit 101 and a gate bias circuit 102 are formed on a mounting board 100 and connected to drain voltage feed terminals 121, 122 and gate voltage feed terminals 123, 124, respectively. Signals are inputted to a signal input terminal 126 and outputted from a signal output terminal 127. The operating bias point is adjustable by applying a gate bias from a resistor divider utilizing a variable resistor in the gate bias circuit 102.
申请公布号 JP2001358543(A) 申请公布日期 2001.12.26
申请号 JP20010123800 申请日期 2001.04.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KUNIHISA TAKETO;YOKOYAMA TAKAHIRO;NISHIJIMA MASAAKI;ISHIKAWA OSAMU
分类号 H01L21/822;H01L21/338;H01L27/04;H01L27/095;H01L29/812;H03F3/195;H03F3/213;(IPC1-7):H03F3/213 主分类号 H01L21/822
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