发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To improve information holding performance for a long term by nonvolatile memory transistors connected in a statically latched state. SOLUTION: A nonvolatile memory has a nonvolatile memory circuit (101) having a pair of series circuits each of a load and the nonvolatile memory transistor and connected in the statically latched state, a program control circuit (102) for storing information in the nonvolatile memory circuit, a volatile latched circuit (104) capable of being latched with memory information of the nonvolatile memory circuit, and a read control circuit (103) for latching memory information of the nonvolatile memory circuit to the volatile latched circuit. The read control circuit supplies an operating power of a statically latching operation to the nonvolatile memory circuit in response to an instruction of a reading operation, and disconnects the supply of the power after the latching operation is completed. Thus, a period in which the nonvolatile memory transistor is exposed with a voltage state for bringing about a useless charge gain or a charge loss is shortened.
申请公布号 JP2001358313(A) 申请公布日期 2001.12.26
申请号 JP20000184528 申请日期 2000.06.14
申请人 HITACHI LTD 发明人 YADORI SHOJI
分类号 G11C16/04;G11C16/06;G11C29/00;G11C29/04;H01L21/8244;H01L21/8247;H01L27/10;H01L27/105;H01L27/11;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/04
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