摘要 |
PROBLEM TO BE SOLVED: To realize a correlated double sampling circuit that solves the problem of settling time after a sample-and-hold circuit and excludes fluctuations in an output level due to a droop characteristic of the sample-and-hold circuit at a variable rate. SOLUTION: This correlated double sampling circuit is provided with a 1st analog/digital converter that receives an output of a CCD image sensor and samples the output for a field-through period of the sensor, a 2nd analog/ digital converter that receives the output of the CCD image sensor and samples the output for a signal output period of the sensor, and a subtractor that subtracts outputs of the 1st and 2nd analog/digital converters.
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