发明名称 BIT STREAM MULTIPLEXER
摘要 PROBLEM TO BE SOLVED: To provide a means that generates byte clocks of a small step with a wide frequency range from a system clock. SOLUTION: The bit stream multiplexer is provided with a multiplex processing means 1 that processes one MPEG-TS input or over according to a prescribed rule, multiplexes them into one multiplexed TS and provides an output of it, an oscillation means 2 that generates a system clock being a reference of a transfer rate of the multiplexed TS outputted from the multiplex processing means, frequency synthesizer means 3 each of which generates a waveform signal repeated at an interval of an optional frequency for each input of the MPEG-TS, comparison means 4 each of which converts the waveform signal outputted from the frequency synthesizer means for each input of the MPEG-TS into a binary digital signal and provides an output of it, and a setting means 5 that gives generated frequency information to the frequency synthesizer means. The byte clocks synchronously with the system clock and having a small step difference are generated.
申请公布号 JP2001359092(A) 申请公布日期 2001.12.26
申请号 JP20000176563 申请日期 2000.06.13
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HOJO MASANAGA;NAKAI SEIJI
分类号 H04N19/42;H04J3/00;H04L7/02;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/423 主分类号 H04N19/42
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