| 摘要 |
An equilibration circuit for a memory device that prevents excessive current from being drawn by the memory device when a row to column short exists while still allowing the use of segmented column repair is disclosed. Each equilibration circuit of a memory device is connected to the equilibration voltage through a transistor that is controlled by a pulsed signal. When the pulsed signal is high, the transistor will turn on, connecting the digital lines to the equilibration voltage to pre-charge the digit lines to the equilibration voltage. The pulse duration is short enough, however, to turn the transistor off before the equilibration voltage can be pulled down if a column to row short exists.
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