发明名称 |
System and method for memory self-timed refresh for reduced power consumption |
摘要 |
A memory controller, upon detecting an interval of inactivity (that is, no read or write access from a processor or I/O devices with respect to main storage or memory SDRAMs) halts external refresh commands from the processor, and initiates STR mode in main storage to preserve data contents in the memory SDRAMs and to save energy. Then, upon detecting a read or write operation, the memory controller signals main storage to exit STR mode.
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申请公布号 |
US6334167(B1) |
申请公布日期 |
2001.12.25 |
申请号 |
US19980144593 |
申请日期 |
1998.08.31 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
GERCHMAN EDWARD T.;GILDEA MARK C.;HOVIS WILLIAM P.;JENSEN RANDALL S.;MAULE WARREN E.;OSTEN THOMAS J.;WOTTRENG ANDREW H. |
分类号 |
G11C11/406;(IPC1-7):G06F12/00 |
主分类号 |
G11C11/406 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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