| 摘要 |
A method for fabricating a semiconductor device is disclosed. In a process for fabricating a CMOS transistor of a high integrated semiconductor device and a cell of a DRAM, a process for forming a dual gate electrode having a layered structure of a tungsten layer and a polysilicon layer includes the steps of forming a gate electrode shape from an undoped polysilicon layer, forming an insulating film spacer at sidewalls of the polysilicon layer, forming an LDD region, removing a portion of the undoped polysilicon layer to leave a predetermined thickness and to form an opening in which the tungsten layer will be formed, and respectively implanting different impurity ions into the undoped polysilicon layer respectively formed in the PMOS region and the NMOS region before forming the tungsten layer. Thus, it is possible to prevent etching residue from occurring and also prevent the semiconductor substrate from being damaged. In addition, it is possible to prevent the tungsten layer from being oxidized due to a high temperature process such as an ion plantation process for forming the LDD region and the source/drain region, thereby improving operational characteristics of the device and process yield.
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