发明名称 SPRIOUS INTERRUPT CONTROL METHOD FOR MULTIPROCESSOR CONFIGURATION
摘要 PROBLEM TO BE SOLVED: To provide a sprious interrupt control method for multiprocessor configuration for shortening time until recovering processing before the interrupt response cycle start of a master unit, which can not acquire the control right of a common bus. SOLUTION: Plural master units M1 and M2 packaged with CPU 11 and 12 having a sprious interrupt function and slave units S1-Sn for requesting services to the master units M1 and M2 by generating interrupts are connected through the common bus and all the interrupts outputted from the slave units S1-Sn are inputted to the master units M1 and M2 but interrupt processing of only one master unit M2, which acquires the control right of the common bus, is started by bus arbitrating parts 13 and 23 of the master units M1 and M2. Then, the master unit M1, which does not acquire the control right, does not start interrupt processing but recovers processing before interrupt response cycle start.
申请公布号 JP2001350734(A) 申请公布日期 2001.12.21
申请号 JP20000168340 申请日期 2000.06.06
申请人 NEC SAITAMA LTD 发明人 MORITA TETSUYA
分类号 G06F15/177;G06F9/46;G06F13/24;G06F15/16;(IPC1-7):G06F15/177 主分类号 G06F15/177
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