发明名称 LEVEL CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a level converter capable of rapidly level converting an ECL level input signal to a CMOS operable output signal, being used even at a power source potential difference of a wide range and preventing a saturation of an output amplitude. SOLUTION: An ECL level signal is level shifted by transistors Q107 and Q108 and resistors R104 and R105, high levels of base potential inputs of transistors Q101 and Q102 are doubled from a voltage (VBE) between a base and an emitter of the transistor to prevent saturations of the transistors Q101 and Q102, a voltage drop occurring at a resistor R103 is generated at a resistor R102, and an emitter potential of a transistor Q103 is output so that the high level becomes a lower voltage by the VBE from a high potential power source and the low level becomes a higher voltage by the VBE from a low potential power source.
申请公布号 JP2001352237(A) 申请公布日期 2001.12.21
申请号 JP20000169838 申请日期 2000.06.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OGATA SHIGEYUKI
分类号 H03K19/0175;(IPC1-7):H03K19/017 主分类号 H03K19/0175
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