发明名称 RECEIVING PATH TIMING DETECTOR CIRCUIT IN DS-CDMA SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a receiving path timing detector circuit in a direct diffusion code division multiple access (DS-CDMA) system which is capable of detecting the path timing of a multi-path propagation line even in an environment with very much noise and very high interference powers. SOLUTION: The receiving path timing detector circuit comprises a cross correlation coefficient calculator (104) for calculating the cross correlation coefficients of a received signal with a reference signal at a predetermined period, a differentially detecting means (105) for multiplying each element of the cross correlation coefficients ( RN, m)) outputted from the calculator (104) by a complex conjugate number of each element of the cross correlation coefficients in one period before to output its real part as a differentially detected cross correlation coefficient ( PN, m}), means (106) for averaging the differentially detected cross correlation coefficients over a predetermined time, and peak detector (107) for detecting one or a plurality of peaks from the averaged cross correlation coefficients ( PAN, m}) to output it as a receiving path timing.
申请公布号 JP2001352274(A) 申请公布日期 2001.12.21
申请号 JP20000173580 申请日期 2000.06.09
申请人 NEC CORP 发明人 SATO TOSHIBUMI
分类号 H04B1/707;H04B1/7075;H04L7/00 主分类号 H04B1/707
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