| 摘要 |
PROBLEM TO BE SOLVED: To improve a using efficiency of an element in a basic cell and to enable a fine regulation of a threshold voltage Vth or a delay time Tpd. SOLUTION: The basic cell has a PMOSTr 1 and a PMOSTr 2 and an NMOSTr 3 and a NMOSTr 4. The PMOSTr 2 is aligned in parallel with the PMOSTr 1, and the NMOSTr 4 is aligned, in parallel with the NMOSTr 3. Gates of the PMOSTr 1 to NMOSTr 4 are parallel to each other. The ate G1 of the PMOSTr 1 is continuously provided with the gate G3 of the NMOSTr 3, and the gate G2 of the PMOSTr 2 is continuously provided with the gate G4 of the NMOSTr 4. A width W1 of the gate G1 of the PMOSTr 1, a width W2 of the gate G2 of the PMOSTr 2, a width W3 of the gate G3 of the NMOSTr 3, and a width W4 of the gate G4 of the NMOSTr 4 are set in the ratio W1:W2:W3:W4=2:2:1:1.
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