| 摘要 |
The circuit arrangement (10) has a resistor (14) at the output branch of a first current mirror circuit (P1,P3). The dual current value of a current source transistor (P4) is dimensioned to flow through the input branch of the first current mirror circuit to branch the current flow of the comparator current corresponding to the current of the resistor. The comparator has two parallel circuit branches of FETs (P5,N1,P6,N2) of different mode of conductivity and switched in series for comparing voltages to control the input branch of a current control transistor (N3). Two of the FETs (P5,P6) of the comparator are fed from the common current source and receive compared voltages at the gates, while the other two FETs (N2,N2) are connected as a current mirror circuit. The current source form with the input branch of the first current mirror circuit a second current mirror circuit (P3,P4).
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