发明名称 SYNCHRONIZATION CAPTURING APPARATUS AND SYNCHRONIZATION CAPTURING METHOD
摘要 A first stage processing section (105) measures the plurality of slot timings corresponding to a plurality of correlation values greater than a threshold value. A second-stage processing section (110) measures the scrambling code timings and identifies the scrambling code group according to any one of the slot timings. A third-stage processing section (115) identifies the scrambling codes according to the scrambling code timings. A control section (104) operates a switch (103) so that the processing by the second-stage processing section (110) and the processing by the third-stage processing section (115) may be executed for the slot timings every processing by the first-stage processing section (105).
申请公布号 WO0197422(A1) 申请公布日期 2001.12.20
申请号 WO2001JP05016 申请日期 2001.06.13
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO.,LTD.;AIHARA, KOICHI;SOMON, JUNJI;IMAIZUMI, SATOSHI;MINAMIDA, NORIAKI;SUZUKI, HIDETOSHI 发明人 AIHARA, KOICHI;SOMON, JUNJI;IMAIZUMI, SATOSHI;MINAMIDA, NORIAKI;SUZUKI, HIDETOSHI
分类号 H04B1/707;H04B1/7083;H04B7/26;H04L7/00;H04W48/16 主分类号 H04B1/707
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