DOUBLE RECESSED TRANSISTOR

摘要

A transistor structure is provided. This structure has a source electrode (12) and a drain electrode (14). A doped cap layer (16) of GaxIn1xAs is disposed below the source electrode (12) and the drain electrode (14) and provides a cap layer opening. An undoped resistive layer (18) of GaxIn1-xAs is disposed below the cap layer (16) and defines a resistive layer opening in registration with the cap layer opening and having a first width. A Schottky layer (20) of AlyIn1-yAs is disposed below the resistive layer (18). An undoped channel layer (28) is disposed below the Schottky layer (20). A semi-insulating substrate (36) is disposed below the channel layer (28). A top surface of the Schottky layer (20) beneath the resistive layer opening provides a recess having a second width smaller than the first width. A gate electrode (22) is in contact with a bottom surface of the recess provided by the Schottky layer (20).