发明名称 Nonvolatile semiconductor storage device
摘要 <p>There is provided a nonvolatile semiconductor storage device capable of securing sufficient read accuracy without providing superfluous sense time margin when there are variations in temperature and transistor characteristics. This nonvolatile semiconductor storage device includes a reference cell 2 whose threshold value is preparatorily set to a value between a lower limit of a threshold voltage distribution in a state 0 in which nonvolatile memory cells MC00 through MC12 have a high threshold value and an upper limit of a threshold voltage distribution in a state 1 in which the memory cells have a low threshold value. When the characteristics of the nonvolatile memory cells MC00 through MC12 shift due to the influence of a change in temperature or the like, the characteristics of the reference cell 2 shift so as to follow this characteristic shift. The operation timing of a sense amplifier section 8 in read operation is generated by a control circuit, and the timing of the termination of the sense operation from among the operation timing is determined by timing control circuit (delay circuit delay and AND circuits AN0 and AN1) with the termination of the sense of the reference cell 2. &lt;IMAGE&gt;</p>
申请公布号 EP1164597(A2) 申请公布日期 2001.12.19
申请号 EP20010305124 申请日期 2001.06.13
申请人 SHARP KABUSHIKI KAISHA 发明人 YAMAMOTO, KAORU;ITO, NOBUHIKO;YAMAUCHI, YOSHIMITSU
分类号 G11C16/06;G11C7/14;G11C16/04;G11C16/28;G11C16/32;G11C16/34;(IPC1-7):G11C16/28;G11C16/26;G11C7/22 主分类号 G11C16/06
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