发明名称 VERFAHREN ZUR ÜBERPRÜFUNG DER ORDNUNGSGEMÄSSEN ANSCHALTUNG INTEGRIERTER SCHALTUNGSBAUSTEINE
摘要 Assuming that modules (SC160 to SC163) are combined into assemblies (SSM16B), registers (RCHID), which can be read from and written to via the data bus (DB) to which the modules are connected, are provided for each module, and the addresses of the relevant component and the relevant module are written to them. Also assuming that, if a component is not connected to the data bus, voltage values which correspond to one binary value appear at the corresponding interface, and that the register of the component can contain a bit of the other binary value if it is reset by a voltage reduction, faulty connections and undesired voltage reductions can be recognised by interrogating the said register (RCHID). <IMAGE>
申请公布号 AT209795(T) 申请公布日期 2001.12.15
申请号 AT19940114452T 申请日期 1994.09.14
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 TROOST, MARCEL-ABRAHAM, DIPL.-ING.;UNTERREITMAYER, HANS-JUERGEN, DIPL.-ING
分类号 G06F11/00;G06F11/22;(IPC1-7):G06F11/00 主分类号 G06F11/00
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