| 摘要 |
PROBLEM TO BE SOLVED: To more finely regulate a volume control by improving an S/(N+D) and improving an output efficiency. SOLUTION: A set value of an output amount is calculated by a gain setter 108 from an output of aΔΣmodulator 101 in which a signal to be calculated is input and a gain control signal. A clock signal is frequency divided by a clock frequency divider 3, supplied to a PWM converter 105 via a logical inverter 104, and supplied to a PWM converter 106. An output of a clock multiplier 102 for multiplying the clock signal is counted by the set value of the setter 108 by a multiplying clock counter 107. An added result of the adder 109 of the converters 105 and 106 is as a result ofΔΣmodulating the signal to be calculated to the multiple bits, further adding the gain control to the result and converting the signal into a PWM signal.
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