发明名称 RECEIVER
摘要 <p>PROBLEM TO BE SOLVED: To obtain both characteristics of good reception sensitivity and an intermodulation in all reception input range by accurately controlling a gain even if a severe fading occurs. SOLUTION: A threshold setter 17a outputs a decision result in response to a level of an Ec/Io to be input from a digital signal processor 16a, and a control memory 18a outputs a set value of the gain corresponding to the input decision result to an analog converter 19 to set a gain of an amplifier (not shown). An Ec/Io monitor 23 measures the Ec/Io, the signal processor 16a monitors an occurrence of a fading from the measured result, outputs the Ec/Io averaged at each one chip to the setter 17a and a digital signal adder 20 when the fading occurs so that the Ec/Io decrease from the threshold, rapidly controls the gain and changes the set value to be set in the memory 18a to a set value becoming a higher gain than a normal set value.</p>
申请公布号 JP2001345782(A) 申请公布日期 2001.12.14
申请号 JP20000163044 申请日期 2000.05.31
申请人 TOSHIBA CORP 发明人 UEMATSU YASUHIDE
分类号 H03G3/20;H04B1/10;H04B1/16;H04B1/707;H04J13/00 主分类号 H03G3/20
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