| 摘要 |
PROBLEM TO BE SOLVED: To enhance manufacturing yield in a connection hole forming method. SOLUTION: After a gate insulation film 12a is formed on the surface of a semiconductor substrate 10, a gate electrode layer 14a and an interlayer insulation film 16a are formed by deposition of a polysilicon layer, an oxidation of the surface, etching in a shoulder part of an oxide film and patterning of a gate. Insulation films 18a, 18b are formed on a side surface of the electrode layer 14a by a thermal oxidation method, and insulation films 18A, 18B are formed on a surface of a substrate. After a resist layer thicker than a step is formed on an upper surface of the substrate based on the layers 14a, 16a, this resist layer is thinned by a sheet type ashing or etching process, so that resist layers 20A, 20B are left behind. A residual thickness of the layers 20A, 20B can precisely be controlled. After a resist layer 22 having a hole 22a exposing a shoulder of the insulation film 16a and a part of the resist layer 20B near the shoulder is formed, a connection hole 24 is formed in a wet-etching process with the resist layers 22, 20B as masks.
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