发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To guarantee high speed and stable read-out operation by following the variation of column addresses and the variation of read-out data and minimizing always delay of speed of read-out data. SOLUTION: In a semiconductor memory of a virtual ground system using a flat cell, the device is provided with a Y selector circuit 2, a virtual GND selector circuit 8, a memory cell section 7, and a reference section 6 having the same constitution, a bank selection line BS of this reference section 6, a word line W, and a GND selection line GS are made common with the memory cell section 7. In reference constitution of the reference cell section 6, all reference cells of a bank being adjacent to a referred reference cell are made off-bit cells. Even in the case in which any bank is selected, characteristics of the memory cell section and the reference cell section are made the same, and read-out characteristics do not depend on a bank.</p>
申请公布号 JP2001344985(A) 申请公布日期 2001.12.14
申请号 JP20000166964 申请日期 2000.06.05
申请人 NEC CORP 发明人 HIBINO KENJI
分类号 G11C17/00;G11C16/04;G11C16/06;G11C16/08;G11C16/26;H01L27/108;(IPC1-7):G11C16/06 主分类号 G11C17/00
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