TOOL FOR AUTOMATIC TESTABILITY ANALYSIS

摘要

The invention concerns a method for verifying whether a specific signal of a complex circuit is operating correctly, enabling to obtain in a computer storage, a profile of states of other signals for which a specific signal condition is expected on a physical sample of the circuit. So as to reduce to a minimum processing time and work space required to obtain said profile, the method uses binary decision diagrams. Since the specific signal can have more than two states (B, H, Z), the method consists in generating at least two binary decision diagrams, a first binary diagram decision whereof the value at 1 indicates that the signal is at the first or at the second state, a second binary decision diagram whereof the value at 1 indicates that the signal is at the second or at the third state.