| 摘要 |
A method and circuit for improving the aperture distortion in parallel A/D converters by reducing the delay mismatch in the sample-and-hold portion of A/D converter circuit. The technique involves generating two complementary clocks, Q and {overscore (Q)}, from a single master clock and then gating these two clocks, in a random fashion, with the original master clock in order to significantly reduce the delay mismatch in the circuit. This approach involves the random selection of gated switches from dual banks each containing a plurality of parallel switches, thereby compensating for aperture error by converting any systematic aperture mismatch between the sampling clocks into random noise spread over the frequency band. High speed A/D converters incorporating the techniques of this invention will provide superior performance in digital audio, digital video, and many other digital applications.
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