| 摘要 |
A signal processing circuit for converting a 2-channel analog signal into a digital signal includes an analog/digital conversion component for sequentially converting the 2-channel analog signal into digital data according to a sampling clock, and an operation control component for setting a high sampling frequency of the sampling clock at a frequency higher than a normal sampling frequency of the sampling clock and setting a sampling clock duty ratio so that digital data of at least one channel can be sampled.
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