发明名称 |
Semiconductor apparatus and manufacturing method therefor |
摘要 |
A semiconductor apparatus and method for making the semiconductor apparatus are provided. The semiconductor memory device can include functional circuit blocks (100) having a multi-layer wiring structure for providing electrical connections between device elements within functional circuit blocks (100). Multi-layer wiring structure can include a wiring layer (M2) disposed in a M2 wiring layer horizontal track (120) and a M2 wiring layer vertical track (122). M2 wiring layer horizontal track (120) provides electrical connections by using wiring layer (M2) disposed in a horizontal direction and M2 wiring layer vertical track (122) provides electrical connections by using wiring layer (M2) disposed in a vertical direction. A wiring layer (M1) can form electrodes having electrical connections to diffusion regions of the device elements in functional circuit blocks (100). Wiring layer (M1) can have a higher sheet resistance and higher melting point than wiring layer (M2).
|
申请公布号 |
US2001050381(A1) |
申请公布日期 |
2001.12.13 |
申请号 |
US20010850254 |
申请日期 |
2001.05.07 |
申请人 |
KIMOTO HISAMITSU |
发明人 |
KIMOTO HISAMITSU |
分类号 |
H01L21/3205;H01L21/768;H01L21/82;H01L21/822;H01L21/8242;H01L23/52;H01L23/522;H01L27/04;H01L27/10;H01L27/108;(IPC1-7):H01L21/82 |
主分类号 |
H01L21/3205 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|