发明名称 |
Semiconductor memory device exhibiting improved high speed and stable write operations |
摘要 |
The present invention provides a circuitry for supplying data from a write input/output line pair to a digit line pair for writing the data into memory cells. The circuitry comprises: a balancing device for balancing in voltage level between the write input/output line pair by making a connection of the write input/output line pair; and a controller connected to the balancing device for controlling balancing operations of the balancing device.
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申请公布号 |
US6330201(B2) |
申请公布日期 |
2001.12.11 |
申请号 |
US19990314156 |
申请日期 |
1999.05.19 |
申请人 |
NEC CORPORATION |
发明人 |
SHIBATA KAYOKO |
分类号 |
G11C11/41;G11C7/10;G11C11/407;G11C11/409;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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