Microelectronic fabrication method employing self-aligned selectively deposited silicon layer

摘要

Within a method for fabricating a microelectronic device there is first provided a silicon substrate. There is then formed upon the silicon substrate a first series of structures having a comparatively narrow spacing which leaves exposed a first series of comparatively narrow portions of the silicon substrate, and where the first series of structures is separated from a second series of structures also formed upon the silicon substrate, the second series of structures having a comparatively wide spacing which leaves exposed a second series of comparatively wide portions of the silicon substrate. There is then masked one of the first series of comparatively narrow portions of the silicon substrate and the second series of comparatively wide portions of the silicon substrate. There is then formed selectively upon the other of the first series of comparatively narrow portions of the silicon substrate and the second series of comparatively wide portions of the silicon substrate a series of patterned silicon layers. Finally, there is then doped simultaneously the series of patterned silicon layers and the one of the first series of comparatively narrow portions of the silicon substrate and the second series of comparatively wide portions of the silicon substrate which was masked.