发明名称 Circuit and method for reducing parasitic bipolar effects during eletrostatic discharges
摘要 A circuit (20) includes a resistor (26) and a current source (32) for raising the voltage of the source of the N-channel transistor in order to keep the base-emitter voltage of the parasitic bipolar device from forward biasing to prevent conduction in the parasitic bipolar device. In one embodiment, a relatively small resistor (26) is coupled between the source of an N-channel transistor (24) and ground. The current source (32) is used to direct some of the ESD current from a positive ESD event through the small source resistor (26) so that the source of the N-channel transistor (24) is elevated during the event, thus preventing snapback of the parasitic bipolar device.
申请公布号 US6329692(B1) 申请公布日期 2001.12.11
申请号 US19980201392 申请日期 1998.11.30
申请人 MOTOROLA INC. 发明人 SMITH JEREMY C.
分类号 H01L27/04;H01L21/822;H01L21/8234;H01L27/02;H01L27/088;H01L29/78;(IPC1-7):H01L29/72 主分类号 H01L27/04
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