| 摘要 |
The present invention provides a method of making self-aligned bit-lines on a substrate, the surface of which comprises a dielectric layer having a plurality of node contact holes and bit-line contact holes. A first conducting layer is formed on the surface of the substrate, filling each node contact hole and bit-line contact hole. Next, a protecting layer is formed over the first conducting layer. The protecting layer and the first conducting layer are etched to form each node contact and bit-line contact. A spacer is formed around each node contact. A second dielectric layer is formed on the wafer, and then etched down to the first dielectric layer and to the surface of each bit-line contact, forming a trench in the second dielectric layer. A second conducting layer is formed on the surface of the substrate, filling each bit-line trench, and a back etching process is performed to remove the second conducting layer from the surface of the second dielectric layer and from each trench down to a certain depth, resulting in a bit-line. Finally, a third dielectric layer is formed on the surface of the substrate, filling each trench.
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