发明名称 Process for exposing for analysis the back side of a semiconductor die mounted in a package
摘要 A method for preparing for analysis the back side of a die in a package. The method comprises removing a selected portion of the package, whereby a selected area of the die is exposed and a cavity is formed in the package. Thereafter, a selected portion the die at the exposed area is removed. In a final phase, the exposed surface of the die is polished.
申请公布号 US6329212(B1) 申请公布日期 2001.12.11
申请号 US19990227599 申请日期 1999.01.08
申请人 ADVANCED MICRO DEVICES, INC. 发明人 DOBROVOLSKI MICHAEL
分类号 G01R31/311;G01R31/316;(IPC1-7):G01R31/26 主分类号 G01R31/311
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