| 摘要 |
An approach to reduce noise associated with ground bounce in integrated circuits containing CMOS gates and drivers is provided. Typical CMOS gates and drivers consist of complementary pairs of MOS gates. As the CMOS driver input transitions from high to low or low to high, there is a brief period during which both gates of a CMOS are conductive. When both gates are on, voltage and/or current spikes can occur from a variety of sources, including parasitic inductance between the gate and its external power supply. Disruptions, bounces, and sinks in voltage and/or current can create noise which can be propagated throughout a chip, potentially resulting in operational errors. The present invention adds a high and low reference voltage and two or more pairs of CMOS gates to each gate's circuit to dynamically add charge and/or draw charge from the CMOS gate as needed to reduce ground bounce and noise.
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