| 摘要 |
<p>A variable delay circuit (60) comprises a delay circuit group (20), a control section (30), and an offset delay storage section group (40). The delay circuit group (20) includes delay circuits (22) each having two first and second paths with different delays. The offset delay storage section group (40) includes offset delay storage sections (44) for each of which an offset delay corresponding to the delay of the first path of the corresponding delay circuit (22) is set. The control section (30) includes subtractors (34) each of which performs an operation of the delay set value (12) and the offset delay and selects one of the paths of the delay circuit (22) where an input signal (10) passes. Since a path is selected on the basis of an operation, any table is needed, and the circuit scale is reduced.</p> |
