发明名称 Library for use in designing a semiconductor device
摘要 For use in designing a logic circuit of a semiconductor device, a library (10) memorizes not only a delay value (TYP, MIN, or MAX) for each of signal paths of a circuit element of the logic circuit but also a standard deviation (sigmaCHIP or sigmaTR) of a variation of the delay value for each of the signal paths of the circuit element. Instead of the standard deviation, the library may memorize a variance of the variation. The variance is given by (sigmaCHIP)2or (sigmaTR)2 when the variation is a normal distribution.
申请公布号 US2001049810(A1) 申请公布日期 2001.12.06
申请号 US20010873708 申请日期 2001.06.04
申请人 SUGIBAYASHI TADAHIKO 发明人 SUGIBAYASHI TADAHIKO
分类号 G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G06F17/50
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