发明名称 |
Semiconductor device and manufacturing method of the same |
摘要 |
By improving profile of impurity concentration in a channel portion of an FET or an IGBT of a trench gate type, variation of threshold value is lessened, and a destruction caused by current concentration is prevented while suppressing deterioration of cut-off characteristics. An island of a base region of p-type is formed in a semiconductor substrate of n-type by carrying out high acceleration ion implantation twice followed by annealing, so that the impurity concentration profile in a channel portion changes gradually in a depth direction. Accordingly, it is possible to lessen variation of the threshold value and to reduce pinch resistance while at the same time improving sub-threshold voltage coefficient and conductance characteristics.
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申请公布号 |
US2001048132(A1) |
申请公布日期 |
2001.12.06 |
申请号 |
US20010865704 |
申请日期 |
2001.05.29 |
申请人 |
ITO HIROYASU;KATO MASATOSHI;ARAKAWA TAKAFUMI |
发明人 |
ITO HIROYASU;KATO MASATOSHI;ARAKAWA TAKAFUMI |
分类号 |
H01L21/336;H01L29/06;H01L29/10;H01L29/739;H01L29/78;(IPC1-7):H01L29/76;H01L29/94;H01L31/119 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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