发明名称 DATA PROCESSING SYSTEM, AND DATA PROCESSING METHOD
摘要 <p>A data processing system and a data processing method control the feed of a clock in accordance with various processing instructions issued from an instruction issuer, and request a data transfer without finishing the data processing instruction if an underflow occurs in a first buffer memory, and process the data again at the end of the data transfer instruction. Therefore, the clock feed before finishing data transfer and data processing can be interrupted to reduce the power consumption. If the underflow occurs in the first buffer memory, on the other hand, the instruction issuer need not issue the data processing instruction again so that the number of instructions issued can be reduced.</p>
申请公布号 WO2001093051(P1) 申请公布日期 2001.12.06
申请号 JP2001004549 申请日期 2001.05.30
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