AUTOMATED PROCESSOR GENERATION SYSTEM & METHOD FOR DESIGNING A CONFIGURABLE PROCESSOR
摘要
A configurable RISC processor implements a user-definable instruction set with high performance fixed and variable length encoding. The process of defining new instruction sets is supported by tools that allow the user to add new instructions and rapidly evaluate them, to maintain multiple instruction sets & to easily switch between them. A standardized language is used to develop configurable definitions of target instructions sets, HDL descriptions of hardware needed to implement the instruction set, and development tools for verification and application development, thus enabling a high degree of automation in the design process.
申请公布号
EP1159693(A2)
申请公布日期
2001.12.05
申请号
EP20000913380
申请日期
2000.02.04
申请人
TENSILICA, INC.
发明人
KILLIAN, EARL A.;GONZALEZ, RICARDO E.;DIXIT, ASHISH B.;LAM, MONICA;LICHTENSTEIN, WALTER D.;ROWEN, CHRISTOPHER;RUTTENBERG, JOHN;WILSON, ROBERT P.;WANG, ALBERT REN-RUI;MAYDEN, DROR ELIEZER;TJIANG, WENG KIANG;RUDELL, RICHARD