Analog multiplying circuit and variable gain amplifying circuit

摘要

A first analog differential signal V1p and a first analog differential signal V1n are applied to the respectively commonly-connected bases of two sets of differential pairs which are constructed of transistors Q1 to Q4. A commonly-connected collector of Q1 and Q4 is used as an output terminal Vop, whereas a commonly-connected collector of Q2 and Q3 is used as another output terminal Von. Collectors of Q11 and Q12 are connected to the respective commonly-connected emitters of these differential pairs. Parallel resonant circuits are connected to the respective emitters of Q11 and Q12, and the emitter-to-emitter path is connected by R15. Input circuits 101 and 102 are connected to the respective bases of Q11 and Q12. A second analog differential signal V2p and a second analog differential signal V2n are inputted to these input circuits 101 and 102. The transistors Q12 and Q14 of the input circuits 101 and 102 constitute current mirror circuits in connection with Q11 and Q13. A total number of longitudinally-stacked stages of the transistors can be made of two stages, and also the analog multiplying circuit can be operated under low power supply voltage. <IMAGE>