发明名称 Memory decoder and method of operation
摘要 <p>A memory capable of storing a present value and at least one past value of a variable accessible by a first memory address. The memory comprises a memory block comprising R rows of memory cells and a row address decoder for decoding the first memory address. During a read operation, the row address decoder causes data to be retrieved from a row in which data stored to the first memory address was last written. During a write operation, the row address decoder causes data to be stored in a next-sequential row following the last-written row. &lt;IMAGE&gt;</p>
申请公布号 EP1160793(A2) 申请公布日期 2001.12.05
申请号 EP20010304407 申请日期 2001.05.18
申请人 STMICROELECTRONICS, INC. 发明人 GUPTA, VIDYABHUSAN
分类号 G11C8/00;(IPC1-7):G11C8/00 主分类号 G11C8/00
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