发明名称 Multi-bank memory device having input and output amplifier shared by adjacent memory banks
摘要 A memory device includes multiple memory banks that share an IO sense amplifier so that the number of sense amplifiers and the number of data lines coupled to the sense amplifiers is decreased and the area of a chip is reduced. In one embodiment, the memory device includes a plurality of memory banks, a plurality of global IO lines in the memory banks for transmitting data from the memory banks, and a plurality of IO sense amplifiers. Each sense amplifier is shared by at least two adjacent memory banks, for selectively sensing and amplifying data received from the global IO lines.
申请公布号 US6327214(B1) 申请公布日期 2001.12.04
申请号 US19990449110 申请日期 1999.11.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YOON HONG-IL;LEE CHANG-HO
分类号 G11C7/06;G11C7/10;G11C7/18;G11C8/12;(IPC1-7):G11C8/00 主分类号 G11C7/06
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