发明名称 Semiconductor memory apparatus which can make read speed of memory cell faster
摘要 A semiconductor memory apparatus including a current detecting circuit, an input signal generating circuit, a reference current detecting circuit, a reference input signal generating circuit and a differential amplifier circuit. The current detecting circuit detects a current flowing through a memory cell to output a detecting signal from an output section of the current detecting circuit. The input signal generating circuit generates a first differential input signal by amplifying the detecting signal to output from an output section of the input signal generating circuit. The reference current detecting circuit detects a current flowing through a reference cell to output a reference detecting signal from an output section of the reference current detecting circuit. The reference input signal generating circuit generates a second differential input signal by amplifying the reference detecting signal to output from an output section of the reference input signal generating circuit. The differential amplifier circuit detects a voltage difference between the first and second differential input signals.
申请公布号 US6327185(B1) 申请公布日期 2001.12.04
申请号 US20000638310 申请日期 2000.08.16
申请人 NEC CORPORATION 发明人 HIRATA MASAYOSHI
分类号 G11C16/06;G11C7/06;G11C7/14;G11C16/02;G11C16/28;(IPC1-7):G11C16/06 主分类号 G11C16/06
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