发明名称 On-die adaptive arrangements for continuous process, voltage and temperature compensation
摘要 An impedance matching arrangement, including an adaptive circuit. The adaptive circuit includes a first adaptive portion allowing impedance matching according to a predetermined first weighting scheme, and a second adaptive portion allowing impedance matching according to a predetermined second weighting scheme which differs from the first weighting scheme. The first adaptive portion is operable substantially during initialization times, and the second adaptive portion is operable substantially outside initialization times. The first adaptive portion may have a binary weighting scheme, and the second adaptive portion may have a linear weighting scheme. Finally, the adaptive 1 circuit is provided as a portion of an integrated circuit (IC) die.
申请公布号 US6326802(B1) 申请公布日期 2001.12.04
申请号 US19990409387 申请日期 1999.09.30
申请人 INTEL CORPORATION 发明人 NEWMAN PAUL F.;JONES JEFF R.;TAYLOR GREG;LIM CHEE BOW;PASDAST GERALD
分类号 H03K19/00;H04L25/02;(IPC1-7):H03K19/018 主分类号 H03K19/00
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