发明名称 Method for fabricating semiconductor device including MIS and bipolar transistors
摘要 After an oxide film has been completely removed from the surface of a substrate by dip etching, the substrate is inserted into a furnace at a temperature as low as about 400° C. to deposit an amorphous silicon film thereon with almost no oxide film existing therebetween. The amorphous silicon film is then patterned into a base electrode and a dopant contained in the base electrode is diffused into the substrate through annealing to form an extrinsic base diffused layer. Thereafter, an intrinsic base diffused layer is formed by ion implantation and an emitter diffused layer is formed by diffusing a dopant from an emitter electrode. Since an oxide film existing between the base electrode and the substrate can be thinner, excessive expansion of the extrinsic base diffused layer due to the diffusion of the dopant can be suppressed. As a result, a semiconductor device, including a bipolar transistor operating at a higher frequency with an increased emitter-base breakdown voltage and improved radio frequency characteristics, can be formed.
申请公布号 US6326253(B1) 申请公布日期 2001.12.04
申请号 US19990333050 申请日期 1999.06.15
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 KOTANI NAOKI
分类号 H01L29/73;H01L21/331;H01L21/76;H01L21/8222;H01L21/8248;H01L21/8249;H01L27/06;H01L29/732;(IPC1-7):H01L21/823 主分类号 H01L29/73
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